1. Technical Field
The inventive concept relates to a method of manufacturing a three dimensional (3D) semiconductor integrated circuit device, and more particularly, to a switching device of a 3D semiconductor integrated circuit device.
2. Related Art
Memory devices are generally provided as internal semiconductor integrated circuit devices of computers or other electronic apparatuses. As is well-known, typical examples of memory devices include random access memories (RAMs), read only memories (ROMs), dynamic RAMs (DRAMs), synchronous DRAM (SDRAM), flash memories, and variable resistive memory devices. Variable resistive memory devices include programmable conductive memory devices, resistive RAMs (ReRAMs), and phase-change RAMs (PCRAMs).
Nonvolatile memory devices, such as PCRAMs, may be used in broad electronic applications to provide high integration density, high reliability, and low power consumption.
The variable resistive memory devices may include a plurality of memory cells arranged in matrix form. The memory cell may include an access device such as a diode, an electric field effect (FET) transistor, or a bipolar junction transistor (BJT), and may be coupled to a word line arranged along a row direction of an array. Memory elements in the memory cells may be coupled to a bit line arranged in a column direction of the array. Through this manner, the access device of the memory cell may select a word line coupled to a gate. The memory cell may be accessed through a row decoder which activates the row of the memory cell.
Currently, transistors having a 3D vertical channel structure are used as the access device of memory cells to increase integration density. As is well-known, transistors having 3D vertical channel structures include pillar-shaped active regions, gates formed on a circumference of the active region, drains formed in an upper portion of the active region and at a higher level than the gates, and sources formed in a lower portion of the active region and at a lower level than the gate or formed in a semiconductor substrate which is in contact with the lower portion of the active region. A heating electrode and a variable resistance layer electrically coupled to a bit line are further formed on the transistor. To facilitate ohmic contact between the drain and the heating electrode, an ohmic contact layer, for example, a silicide layer, is formed between the drain and the heating electrode.
Endeavors for improving the operation current in variable resistive memory devices using 3D transistors as access devices continue, and various methods for improving the operation current have been suggested.